JBoss不能加载struts2-core-2.2.3.1.jar

——提示：Could not create JarEntryRevision for……

学习Eclipse（Kepler）时，使用struts2 2.2.3.1和JBoss EAP 6.02.GA，在启动JBoss时，提示：Could not create JarEntryRevision for……\struts2-core-2.2.3.1 (文件名、目录名或卷标语法不正确。)

在网上查找很长时间才找到一个相关的帖（/topics/380025531），提供了解决办法，为了节省后来学习者的时间，特意写此文档。

原因：这是struts2在jboss下的bug问题，是xwork-core-2.2.3.1.jar的问题。

解决方案：

方法1、（https:///thread/160683）

修改xwork-core的jar包文件com.opensymphony.xwork2.util.URLUtil

//--------------------------------old code----------------------------------------------------

public static final String JBOSS5_VFSZIP = "vfszip";

public static final String JBOSS5_VFSMEMORY = "vfsmemory";

public static boolean isJBoss5Url(URL fileUrl) {

final String protocol = fileUrl.getProtocol();

return JBOSS5_VFSZIP.equals(protocol) || JBOSS5_VFSMEMORY.equals(fileUrl.getProtocol()); }

//--------------------------------end of old code-------------------------------------------

and change it to:

//--------------------------------fixed code----------------------------------------------------

public static final String JBOSS5_VFS = "vfs";

public static final String JBOSS5_VFSZIP = "vfszip";

public static final String JBOSS5_VFSMEMORY = "vfsmemory";

public static boolean isJBoss5Url(URL fileUrl) {

final String protocol = fileUrl.getProtocol();

return JBOSS5_VFS.equals(protocol) || JBOSS5_VFSZIP.equals(protocol) ||

JBOSS5_VFSMEMORY.equals(fileUrl.getProtocol());

}

方法2、

下载修正的包"xwork-core-2.3.1-SNAPSHOT.jar"替换xwork-core-2.2.3.1.jar。

根据上面的链接，找到此方法，但下载地址是错误的，就转到回复中的另一个链接：，再转到链接：，终于找到相应包的下载地址。

xwork-core-2.3.1-SNAPSHOT.jar下载地址：

张家恺2014-11-24

 

第二篇：Conformance Testing of Soft-Core CAN Controllers

ConformanceTestingofSoft-CoreCanControllers:

ALow-CostandPracticalApproach

ImranSheikh1andMichaelShort2

1EmbeddedSystemsLaboratory,UniversityofLeicester

UniversityRoad,LE17RH,UK

si52@le.ac.uk

2Electroincs&ControlGroup,TeessideUniversity

BoroughRoad,Middlesbrough,UK

m.short@tees.ac.uk

Abstract.Sinceitsintroductionintheearly1980’s,CANhasbecomethede-factocommunicationsprotocolemployedinvehicleandindustrialcontrolap-plications.BeforeanynewdevicecanclaimtosupportCAN-connectivity,exten-siveconformancetestingisnormallyrequiredtodemonstratecompliancewiththeprotocolatthephysicalanddatalinklayers.Tohelpstandardizethenatureofthespeci?ctestplansanddocumentationrequiredforthistesting,theISOhaspublishedasetofdraftstandardsspeci?callyforCANconformancetesting.Todate,mostcommercialCANcontrollersandtransceivershavebeenimplementedatthesiliconlevel,eitherintheformofdedicatedIC’sorason-chipperipheralsofembeddeddevices.ThepracticalimplementationofCANconformancetestershasbeenrealisedusingdedicatedhardwareandspeciallywrittenanalysissoft-ware;thisisapracticalapproachwhentestingandverifyingconformancepriortohigh-volumeICmanufacture.However,recentyearshaveseenanincreasedin-terestintheemploymentofprogrammablelogicdevicessuchasFPGA’sfortheimplementationofCANcontrollersandCAN-enableddevices.Such‘softcore’implementationsareoftenrealisedinsmall-volume(orsometimesevenone-off)batches;insuchcircumstances,costandavailabilityreasonsmaydictatethatde-veloperssimplycannotemploytraditionalCAN-conformancetestingequipment.Tohelpalleviatethisproblem,thispaperproposesalow-costandeasilyimple-mentedmethodwhichwillallowdeveloperstofullytestaCANsoftcoreim-plementation.ThemethodallowsdeveloperstoverifyaCANcoreagainsttherelevantISOstandardsusingonly(low-cost)off-the-shelfdevelopmentboards,coupledwithasimpleanalysistoolsuchasChipscope.Finally,thepaperexten-sivelydescribestheuseofthetestbedintheveri?cationofanopen-sourceCANsoftcoreimplementation.

Keywords:Controllerareanetwork,Conformancetesting,Softcore,Networkprotocolveri?cation.

1Introduction

Conformancetestingisanintegralpartofthedevelopmentstageofanynetworkpro-tocolimplementation.Whenperformedcorrectlyconformancetestingveri?es,toanJ.A.Cettoetal.(Eds.):InformaticsinControlAutomationandRobotics,LNEE85,pp.129–141.

cSpringer-VerlagBerlinHeidelberg2011springerlink.com??

130I.SheikhandM.Short

acceptabledegreeofcon?dence,thattheimplementationofgivensetofprotocolspec-i?cationshasbeencorrectlyinterpretedbythedesignersandhasbeeninstantiatedinaformthatisfreefromerrors.

Sinceitsintroductionintheearly1980’s,theControllerAreaNetwork(CAN)pro-tocolhasbecomethede-factocommunicationsprotocolemployedinvehicleandin-dustrialcontrolapplications.InlightofthepopularityofCAN,theISOhasdevelopedastandardexclusivelyaimedatCANconformancetesting.BeforeanynewequipmentdesigncanclaimtobeCANconformant[1],evidenceisrequiredthatshowsthatthetestingproceduresoutlinedin[2]standardhavebeenperformedandpassedwithoutproblem.TheISOdocumentnotonlyspeci?esdifferenttypesofteststhatmustbeper-formedforconformancetesting,butalsospeci?esaTestPlan(TP)architecturebasedonthe[3].TherequiredTPisshownin?gure.1.Ascanbeseenfromthis?gure,theTParchitectureindicatesthatthetestershouldbedividedintotwoparts.The?rstcompo-nentistheLowerTester(LT)whichprovidesthetestpatterngenerationandanalysis.ThesecondistermedtheUpperTester(UT),whichisrequiredtocontainthesoftwaretocontroltheCANImplementationUnderTest(IUT).TheUTisnormallyahostpro-cessororprogrammabledeviceofsomekind,andalsoprovidescoordinationtoconductthetestsbetweentheLTandtheIUT[4].TheUTreceivesstimulus(withdetailsofthetestbeingperformed)fromtheLT,andgeneratesmessagespassedontotheIUT.TheIUTthenprocessesthesemessages,andboththeUTandLTcomponentsmonitoritsbehaviourforconsistencywiththeCANprotocol.Iftheresultissatisfactory,thetestisconsideredpassedandtestingproceedstothenextconformancetest.Itshouldbenotedthatthetestingproceduresthatarerequiredtobeimplementedincludecoverageofcommonerrorconditions,randomizedtestsandalsobittimingtests.Mosttestsarecritical,andthelattercategorybittimingcontainsanumberofteststhatcanbedif?-culttolocalize,andasuitablemeansisrequiredtocaptureanddisplaymultiplelogicsignalsoveranappropriatetimescale.Thistypicallyrequirestheuseofdedicatedhard-wareandLogicanalysers[5].

Traditionally,CANcontrollersandtransceivershavebeenimplementedatthesil-iconlevel,eitherbydedicatedIC’sorason-chipperipheralsofembeddeddevices.Practically,theimplementationofCANconformancetestershasbeendoneusingded-icatedhardwareandspeciallywrittenanalysissoftware,whichisapracticalapproachwhentestingandverifyingconformancepriortohigh-volumeICmanufacture.Themo-tivationforthecurrentworkisasfollows.RecentyearshaveseenanincreasedinterestintheemploymentofCAN-enableddevicesimplementedbyprogrammablehardwaredevicessuchasFPGA’s.Bytheirverynature,such‘softcore’implementationsareoftenneededinsmall-volume(orevenone-off)batches.Inthesecircumstances,costandavailabilityreasonsoftendictatethatitisnotpracticalfordeveloperstousetradi-tionalCAN-conformancetestingequipment.AnongoingprojectwithintheEmbeddedSystemsLaboratory(ESL)attheUniversityofLeicesterrequirestheuseofsuchaCANsoftcore[6].Tohelpalleviatethisproblem,thispaperproposesalow-costandeasilyimplementedmethodwhichwillallowdeveloperstotestaCANsoftcoreimple-mentationforconformancetotherelevantstandardwithouttheneedforexpensiveorproprietaryhardwareinterfacesandlogicanalysers.

ConformanceTestingofSoft-CoreCanControllers

131

Fig.1.ISO9646-1TestPlanArchitecture

Theremainderofthepaperisorganizedasfollows:InthenextSection,wewilldescribetheControllerAreaNetworkinbriefandthenwillpresentareviewofdif-ferentCANconformancetestingimplementationsofthebeforeandafterISOstandardevolved.Section3describestheformationofthecurrenttestbedforCANconformancetesting.Section4presentsthecasestudiesinvolvingtwoofthetestsbeingcarriedoutbytheproposedapproachtoCANconformance.Section5willpresenttheanalyti-calcomparisonofourapproachtotheothertechniquesusedforconformancetesting.Section6presentsourinitialconclusions.

2ControllerAreaNetwork

2.1Protocol

TheControllerAreaNetwork(orsimplyCAN)isoneofthemostwidelyemployedprotocolsforcreatingdistributedembeddedsystems,withapplicationsasfarrangingasvehicleelectronics,processcontrolandmanyotherimportantindustrialapplica-tions[1].SomeofthekeyfeaturesofCANthathaveledtoitswidespreadusein-cludelowoverheads,non-destructivebitwisemessagearbitration,lowmessagelatencyandgooderrordetectingabilities;allfeatureswhicharerequiredforcontrolapplica-tionsrunningonembeddedprocessors[7,8].Asmentioned,theprotocolemploysauniquenon-destructivepriority-basedarbitrationscheme;whenmultiplenodesattempttotransmitmessagessimultaneouslythismechanismensuresthatthehighestprioritymessagegains?rstaccesstothebus.Ifprioritiesarecarefullyassignedtothemessages,andappropriatetiminganalysisisperformed,CANmaybeusedtoimplementseveraldifferenttypesoftime-criticalsystems(e.g.see[7,8,9]).

132I.SheikhandM.Short

Thewired-ANDnatureofthephysicallayer,whichisusedtoachievetheaforemen-tionedpriority-drivenarbitration,requiresthatallnodesinthenetworkachievealogicalconsensusontheinstantaneousbit-patternsappearingonthebuslines.ThisparticularrequirementoftheprotocolactstoseverelylimitboththemaximumtransmissionspeedandbuslengthofagivenCANnetwork;themaximumtransmissionrateisinverselyproportionaltothelengthofthebus,andhasanupperlimitof1MBit/s;duetoitsdesignaCANframemaycarryuptoamaximumof8databytes.Inaddition,thismechanismplacesextremelyspeci?crequirementsonthenatureoftheconformancetestingthatmustplaceforaCANenableddevice;asigni?cantproportionoftheISOteststandardisdevotedtothissingle,criticalaspectoftheprotocol.

2.2CANConformanceTesting

OneoftheearliestCANprototypecontrollerswasnamedDBCAN[10].Thisimple-mentationwastestedusingalogicanalyserandapatterngeneratorcircuit.Astherewasnostandardforconformancetestingatthetimetheprototypewasdeveloped,acommer-cialbasic(asopposedtofull)CANcontrollerwasusedasbenchmarkforveri?cation.Amajordisadvantageofthisschemewastheuseofexternalinterfacemodulestovisu-alizethestateofdifferentDBCANregisters,andthetestingprocedurewassomewhatlimitedinthenumberofsignalchannelsthatcouldbesimultaneouslyanalysed.SincethisisaneededrequirementinthecaseofISOstandardconformancetestingtheabilitytovisualizethestateoflargenumbersofCANregisterssimultaneouslyisaprerequisitesuchasetupislimitedinthisrespect.

AHardwareemulationtechniquewasusedtoverifyaCANsoftcorein[11];?rstly,thesynthesizednetlistisdownloadedintoahardwareemulator.Thisemulatoriscon?g-uredbyaPCandthecommunicationbetweenthetwoiscarriedviaaspeciallydesignedinterfacecardconnectedtotheEISAbus;thisemulatorisalsoconnectedto2commer-ciallyavailableCANchips.Thedrawbackwiththistechniqueisthatagain,customizedhardwarealongwithsoftwareespeciallywrittentocarryouttheconformancetestingisrequired.Additionally,toemulatethebusfailuresandpotentialerrorconditionsonthebusamanualtechniqueofconnectingCANbustotheoutputofindividualnodesisemployed,whichlacksef?ciencyandisnotrobustenoughtocoverallthescenariosgivenwithinISODIS16845.

Aslightlydifferentveri?cationtechniquewasreportedby[12].Theirtechniqueemployedcustomdesignboardswith8051microcontrollersandSJA1000CANcon-trollers,butthismethodinvolvedthedesignofspecializedinterfacehardwareandboardstoassistwiththetestingplan.Specialisedveri?cationarchitecturefortestingautomotiveprotocols(includingCAN)atboththemoduleandchiplevelwasproposedby[13].Again,thisworkrequiresaspeciallydesignedCANveri?cationcomponentaspartofthesilicon,whiletheselectionandimplementationofactualtestsequences,alongwiththeselectionofasuitablemeanstomonitoringbussignals,isleftopenforthetester.

WithrespecttosoftcoreCANimplementations,theCANe-Veri?cation(CANeVC)testbenchhaspreviouslybeendescribed[14].ThiscommercialtestfacilityrequiresaCANspeci?cationcoretobeembeddedinthenetlist;thiscorethenrunsspeci?cteststoverifythebehaviouroftheCANsoftcore.Again,thistechniqueinvolvesa

ConformanceTestingofSoft-CoreCanControllers133

timeconsumingdevelopmentofatestbenchusinganexpensivecommerciallyavail-ableveri?cationIP;additionally,compatibilityissuesoftenarisewhenusingCANimplementationsotherthantheproprietaryimplementationandonlyalimitednumberofprogrammablelogicdevicesaresupported.

Finally,severalexperimentalimplementations(suchasthatreportedby[15]tomea-suresingleparameters-suchasCANbiterrors-ratherthanperformcompletecon-formancetestinghavebeendescribedintheliterature.Suchimplementationshavetypi-callyusedcomplexandnon-trivialmeans,requiringcustomizedhardwareandsoftware.Insummarythen,itcanbeobservedthat-todatespecialisedhardwareand/orsoft-warehasbeenrequiredtoassistwithCANtestingplans.InthefollowingSection,anoveltestingapproachthatreliesonlyupontheuseoflow-cost,standardoff-the-shelfhardwareandsoftwareisdescribed.

2.3ProtocolLimitation

However,theCANprotocolitselfisnotwithoutitsdrawbacks;althoughthebasicrawprotocolissuitableforuseinmanysoftreal-timesystems,itsuffersfromseveralsig-ni?cantproblemswithrespecttohardreal-timesystems,forexampleinsafety-criticaldistributedbrake-by-wiresystems.Thesedrawbacksincluderedundancyissues,atomicbroadcastproblems,lackofprotectionfrombabblingidiotfailuresandinformationthroughputrestrictions.Althoughresearchhasshownthatmanyoftheseissuescanbedealtwithbythecreationofhigher-level,software-basedprotocolextensions(e.g.see[7,8,16]),someproposedsolutionsareeithercomplextoimplementplacingasig-ni?cantcomputationaloverheadonthehostCPUorsimplycannotbeimplementedinsoftwareandahardwaresolutionmustbeadopted[17].Althoughtheproposedchangesareconceptuallyquitestraightforward,implementingthemdirectlyinsiliconiscostlyandhasprovedtobeproblematicforsmall-volumerequirements.AworkablesolutiontothisproblemistoimplementtheprotocolonaPLD;therequiredmodi?cationsmaythenbeachievedwithrelativeease.Thissolutionbringswithitanother,relatedprob-lem;beforeveri?cationofanymodi?cationscantakeplace,itmustbeshownthatthebasicsoftcoreCANimplementationisfullyconformanttotheprotocol,apotentiallycostlyandtime-consumingprocedureinitsownright.

Tohelpalleviatethisproblem,thecurrentauthorshavepreviouslyproposedalow-costandeasilyimplementedmethodinatechnicalreport[18].ThisreportessentiallydescribetheapplicationofthetechniquesdescribedinthepreviousSectiontothecon-formanceofaCANsoftcore.ThefollowingSectioncontainsadescriptionofthetestfacilitythatwasemployedinthesestudies.

3TestBed

Real-timetestingofaCANimplementationisquiteacomplicatedprocedure,andinthiscaseforpracticalreasons,nospecializedhardwareandsoftwarewasavailabletogeneratetherequiredtestingpatternsandmonitorthebehaviouroftheCANsoftcore.Forthisreason,itwasdecidedtouseonlylow-costofftheshelfcomponents.

Inadditiontothesestandardhardwareparts,theChipscopeanalysistool[19]wasusedtovisualizeandcapturethebehaviourofthesoftcore,allowingveri?cationofthe

134I.SheikhandM.

Short

Fig.2.ConformanceTestBed

testingresults.ChipscopeisaXilinxtestingtoolwhichisimplementedbyinsertingasmallcoreontothedevicetobemonitored,allowingmultiplesignalchannelstobecapturedviaaJTAGinterface.Upto16internalsignalportscanbeanalysedinasinglecore,andeachportcanhaveupto256signals.MultiplecorescanbeattachedinaFPGAtoincreasethenumberofsignals[20].IncomparisontoothermeansforcapturingmultipleFPGAsignals,Chipscoperetainsthekeyfeaturesrequiredbutisafractionofthecost.Additionally,tosupportone-offconformancetestingplanswithoutcausingexcessivecosts,afully-featuredevaluationversionisavailablefora60dayperiodafulltestingplancanbeperformedinsuchatimeframe.HencethesefeaturesofChipscopemadeitanobviouschoiceforourCANconformancetestbed.Thenewtestfacilityisshownschematicallyin?gure2.InthenextparagraphswegiveafulllistofthehardwareandsoftwarecomponentsandtoolsusedinbuildingtheTestBed.

3.1Hardware

1.TwoIntegratedboardswithFPGA’s(programmedwithCANsoftcore)andanARM7workingasaHostcontroller.TheseboardsarenamedasSC1andSC2.ThepurposeofusingtwosoftcoresistoverifysimultaneousbehaviourasaCANTransmitter/ReceiveraswellastogeneratespecialpatternsontheCANbususingVIOandadditionalsoftmodulesembeddedwiththesoftcore.

2.TwoARM7MicrocontrollerboardswithIntegratedCANcontrollerandtrans-ceivers(NodeKEandOLin?gure2).TheseboardsareusedasCANReceiverNodesforfurtherveri?cationofthemessagessentbytheCANsoftcore.Theother

ConformanceTestingofSoft-CoreCanControllers135

utilityoftheseCANnodesaretoinduceextraorerroneousbitswhichisarequire-mentoffewtestcasesasmentionedin[2].

The?gure2demonstratea2nodeSoftCore,itcaneasilybeextendedtonnumberofnodesconsideringtheprotocollimitations.

3.2Software

1.XilinxISE[21]forsoft-coreprogramming,synthesis,routingandprogrammingtheFPGA.TheISEisacompleteIDEforFPGAdevelopmentandcontainssomeextrafeatureslikepoweranalysis,optimalroutingandtiminganalysistonameafew.

2.ChipscopeProisusedasanalysistool.TheVIOcoreisusedtogenerateandcontroldifferentbitpatterns.Thesebitpatternscanbesynchronousorasynchronous.

3.TheKeiluVision3IDE[22]withfreeARMtoolsCcompilerwaschosenforprogramminganddebuggingtheMicrocontrollerboards.

Ascanbeseen,thetestbedhasbeenmadeusingCOTShardwareandalsotakingincarethestructureoftheTestPlangivenintheISO9646-1.TheTestBedconsistsoftwoinstancesoftheIUT,themainpurposeofusingthesecondIUTistogenerateerrorsontheCANbusandspecialconditionswhichwereeitherthepre-requisiteforatestcaseorgeneratingspecialbitstreamduringatestforverifyingthebehavioroftheIUT,hencethesecondinstanceofIUTismoreoverworkingastheLTinreferencetotheISO9646-1TP.

TheARMboardswithintegratedCANControllerswereusedeitherasreceivers/transmitterstoverifytheconformanceoftheIUTwithwidelyusedCANcontrollers,andwerealsoemployedtogeneratebiterrorsontheCANbususinganinterruptgen-erationmechanism.Thisschemeishighlysynchronizedasthebitinversionsweredoneatthespeci?cpointwhereitwasrequired;themethodologyemployedfortestpatterngenerationisdescribedinthenextSection.

3.3TestPatternGeneration

Whenusingpatterngeneratorstestvectorsarerequiredtobe?rststored,andaresentontheCANbusonlywhenrequiredthusputtingtheIUTindifferentstatesandallowingitsbehaviourandresponsestobeanalysed.InourproposedtestbedwehaveusedFPGAbasedpatterngeneration,whichisnotonlyeconomicalasnoextrapricewasaddedtothetestsetupbutalsoitisaddedasaseparateVerilog[23]moduletothemainCANCoreanditwillworknon-intrusivelyasthiscodispartoftheCANcorewhichistakingtheroleofanLT.Thishelpedustoaccuratelyproducespecialconditions;forexampleinatestcaseitwasneededtoproduceextradominantbitsontheCANbusafteranIUTworkingasatransmittersendanErrorFrame[2].ThistestpatternwaseasilyachievedbymodifyingtheVerilogmoduleforErrorFlaggenerationtoproduceextradominantbits,asillustratedbythecodefragment:

136I.SheikhandM.

Short

Fig.3.TransmittersnapshotforOverloadframetestcase

reg[3:0]Error_Flag_Counter;//changedfromreg[2:0]

always@(posedgeClockorposedgeReset)

begin

if(rst)

Error_Flag_Counter<=4’d0;

elseif(Error_Frame_End|Error_frame_Start)

Error_Flag_Counter<=#delay4’d0;//changedfrom3’d7

elseif(Error_Frame&Transmit_Instance&Error_Flag_Counter<4’d11))Error_Flag_Counter<=#delayError_Flag_Counter+1’b1;

end

always@(Error_frameorError_Flag_Counter)

begin

if(Error_frame)

begin

if(Error_Flag_Counter<4’d11)//changedfrom3’d7

begin

if(Node_Error_Passive)

Tx_CAN=1’b1;

else

Tx_CAN=1’b0;

end

end

end

4TestCases

TheproposedtestfacilitywasemployedtotesttheCANconformanceofthecustomcre-atedCANsoftcore,writteninVerilog.AsthenumberoftotalnumberoftestcasestoconsiderinanysingleCANconformancetestplanisnumerous,itisbeyondthescopeof

ConformanceTestingofSoft-CoreCanControllers137

thecurrentpapertopresentcomprehensivetestresults;suchtestresultsareavailableintheformoftechnicalreport[18].However,inthisSectionwewillpresenttwotestcasesthathelphighlightthemainfeaturesoftheproposedfacility.Bothtestswerecarriedoutsuccessfully,andaredescribedinthefollowingtwoSections.

4.1OverloadFrameManagement

ThistestisapartoftheOverloadFrameManagementclass[2].Thistestveri?esthatanIUTwillbeabletotransmitadataframestartingwiththeidenti?erandwithouttransmittingSOF,whendetectingadominantbitonthethirdbitoftheintermission?eld.ThistestinvolvestwoinstancesoftheIUTandtheARM7Microcontrollerboards.Thetestwillbesetupusingthefollowingorganization:

1.BothoftheIUT’smustbeindefaultstatereadyfortransmissionorreceptionaccordingtothesetupsentbytheHostController.

2.TheIUTactingastheTransmitterissettotransmittwodataframesasprogrammedintheHostprocessor.

3.TheReceiverIUTwillbesettorequestanOverloadframeafterreceptionofthe?rstframe.

4.AfterthecompletionoftheOverloadFrameonthethirdbitoftheIntermission?eld(NormallytheIntermission?eldisasequenceofthreeRecessivebits)issettodomi-nantbytheFaultinjectornodei.e.K.E.

5.Thetransmittermustnotconsideritasabiterrorandshouldn’tsendaDominantlevelSOFandconsiderthedominantbitoftheIntermission?eldastheSOF.

6.Normalreceptionofthemessageshouldtakeplace.

Thistestwassuccessfulwithdesiredresultsasstatedinthepurposeofthetest;theobser-vationonthetransmitternodefromtheChipscope-shownin?gure3isasfollows:

1.LeftofMarker‘T’TheTxstate?agishighindicatingongoingtransmission,ReceivestateDataandACKDELIMindicatingasuccessfultransmissionwhilethenodeiserroractive.

2.AtMarker‘T’thereisanerrorontheReceivestateintermission?eldgeneratinganoverloadframewithOverloadFlagofsixdominantandOverloaddelimiterof8bitsascanbeseenbythecountofsamplepoint.

3.AftertheOverloadframeanintermission?eldsignalcanbeseenattheMarker‘X’.

4.Thethirdbitofintermission?eldisisadominantbitascanbecountedbetweenMark-ers‘X’and‘O’thenumberofsamplepointsis2andthethirdsamplepointisadominantbit.

5.JustaftertheMarker‘O’wecanseetheReceiveStateID[10:0]goinghighwithoutanySOF.TheIdenti?er?rst4bitsaredominantasrequiredbytheTestcase.

4.2SuspendedTransmissionFieldTest

ThepurposeofthistestistoverifythataPassivestateIUTactingasatransmitterdoesn’ttransmitanyframebeforetheendofasuspendedTransmission?eldfollowinganErrorFrame.

138I.SheikhandM.

Short

Fig.4.Transmittersnapshotforsuspendedtransmissiontestcase

ThesetupforthistestistoputtheTransmitterIUTintoErrorPassivestateandthenintroduceabiterrorduringtransmission.TheIUTwillsendaPassiveErrorFlagwhichisoverwrittenbyActiveErrorFlagfromparticipatingCANnodes,theIUTwillreceive7dominantbitsastheErrordelimiter.AfterthecompletionoftheErrorFlag,theIUTwillsendthependingdataframeoncetheSuspendedTransmissionFieldisover.

Thistestwassuccessfulwithdesiredresultsasstatedinthepurposeofthetest;theobservationonthetransmitternodefromtheChipscope-shownin?gure4isasfollows:

1.LeftofMarker‘T’TheTxstateFlagishighindicatingongoingtransmissionwhenabiterrorsetthenodetosendanErrorFrame,thenodeisErrorPassive.

2.BetweenMarker‘X’and‘O’thereisnotransmissionwhentheTxSuspendstateishighwhichisindicatedbytheTXStatelowstatusalthoughincaseoferrorrecoverythere-transmissionofthemessageiscarriedsoonaftertheintermission?eld.

3.AstheTxSuspendstateissettolowafter8bittimesthentheSOFisindicatedbyCANReceiveandCANTransmitsignalswhichchangestodominantstate.

4.RestoftheReceivestatesignalsindicatesthere-transmission.

5ComparativeStudy

ThisSectionpresentsacostand?exibilitycomparisonbetweenconventionalCANcon-formancetestinghardwareandsoftwarewiththeapproachthathasbeendiscussedinthispaper.The?rstobservationisthatthenextfacilitydoesnotrequireexpensiveCANPCinterfacecards[24,25]whicharenormallyrequiredforCANconformancetesting[26].ThesecardsareusedtocaptureCANbusdatatoanalysetheinternalstatusofdifferentreg-istersandtologtheevents;thesecardsnotonlyrequiredthehardwarebutalsospecializedsoftware[27]alongwithinterfacecableswhichcanalsoaddtothecostandcomplexityofthesetup.InourproposedimplementationwecananalysetheinternalstateofCANIUTdirectlyusingChipscope,andalsobyusingtheKeiluVision3IDE.ThisIDEcanrunanonlinedebugontheCOTSARMboards,whicharesigni?cantlycheaperincomparisontospecialisedCANinterfaceCards.TheKeilIDEcandisplaythestatusofalltheCAN

ConformanceTestingofSoft-CoreCanControllers139

registershenceprovidingususefulinformationinveri?cationofthestatusoftheCANbusandthedatabeingtransmittedandreceived.Inaddition,thereareseveralkeyadvantagesofourproposedtestbedusingChipscopeoverhardwarelogicanalysersystems:

1.Thestandardbenchanalysersdoesn’tshowenoughsignalsasrequiredincaseofCANconformanceasillustratedinsection4.ThereareLogicanalysersystemswhichcanshowlargenumberofsignalssimultaneouslywithlargedatawidths[28]buttherepricesare10timesmorethanIntegratedLogicanalyser.

2.NormalBenchanalyserscanshowMegasamples[29,28],whiletheChipscopeislim-itedtoaSamplewidthof16K,weovercomethisproblembyusingDigitalclockMan-ager[30]whichcandivideormultiplythesystemclockby‘n’times,theboardweusedinoursystemcandividethesystemclockby16timeshencewewereabletocapture16timesmoresamplethanonsystemclockwhichcaneasilycapture3to4completeCANmessagesinasingletrigger.

3.AdditionalprobeswithwidenumbersofI/OpinsarerequiredtointerfacewiththeLogicanalyserswhileChipscopecancarrymagnitudeofthesesignalsusingasimpleJTAGcable,althoughtherearefewsolutionlikeAgilent’sFPGAtraceport[31]whichuseasimpleinterfacetoanalysemultiplesignalsbutitalsorequiresaspecializedhardwareandChipscopeprotool.

4.NotonlyallI/OsignalsareaccessiblethroughChipscopebutalsointernalwirescanbetraced[32]whicharereallyhelpfulinConformancetestingspeciallywhensettinguptriggeringconditionswehavelotmoreoptionstosetupatriggerconditionforexampleinthetestcasesdiscusseditisreallyeasytosetupatriggerconditiontowaitforanErrorFrame?agsignalgoestohightoanalyseanerrorcondition,whileforexternalLogicanalysersonlyI/Osignalsareavailable.

6ConclusionsandFutureWork

InthispaperwehavepresentedanapproachtoutilizeVirtualI/OsandIntegratedLogicAnalyserstoperformCANconformancetestinginaccordancewiththeISOstandards.IthasbeenshownthatthefacilityiscapableofperformingthefullrangeoftestrequiredandspeciallyrelatedtoCANbittimingtestsconformingtotherelevantCANstandard.Inconclusion,thisfacilitycanbeassembledandusedforafractionofthecostofaregu-lartestfacilityforCANconformance.Afulllistofthehoweachindividualtestmaybeimplementedwhenusingafacilitysuchasthishasbeendescribedin[18].

Asa?nalnote,itcanbeseenthattestfacilitythathasbeendescribedisnotrestrictedtotheCANprotocol,andwithsuitablemodi?cationscanbeusedtotestconformanceofmanyalternatenetworkprotocols,forexample[33].

Acknowledgements.TheworkinthispaperissupportedbytheawardofaPhDscholar-shiptoSheikhImranfromtheNWFPUniversityofEngineering&Technology,Peshawar,PakistanthroughtheHigherEducationCommissionofPakistan.

140I.SheikhandM.Short

References

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